| 摘要 |
PROBLEM TO BE SOLVED: To provide a BIST circuit capable of generating a wider range of test sequences while simplifying a circuit configuration.SOLUTION: The BIST circuit comprises an address-data conversion circuit to which a logical address signal, a logical data signal, and a logical expected value signal are inputted. The address-data conversion circuit generates a physical data signal for specifying physical data to be written into memory by converting the logical data in accordance with the physical configuration of memory. The address-data conversion circuit generates a physical address signal for specifying a physical address of memory corresponding to the physical data by converting the logical address in accordance with the physical configuration of memory. The address-data conversion circuit generates a physical expected value signal for specifying a physical expected value which is an expected value for read-out memory data corresponding to the physical data by converting the logical expected value in accordance with the physical configuration of memory. |
