发明名称 ALTERNATING VOLTAGE STABILISER
摘要 FIELD: electricity.SUBSTANCE: in alternating voltage stabiliser comprised of digital regulator coupled between input and output clamps, interval-code converter, which data input is coupled to output clamp, clock input is coupled through synch pulse generator to input clamp, control input coupled to reference voltage source as well as logic device coupled by data input to output of interval-code converter and by its clock input to output of synch pulse generator, there are additional register, reference voltage source and interval-code converter, which control input is coupled to additional reference voltage source, its clock input is coupled to output of synch pulse generator and data input is coupled to output clamp, at that register is coupled to outputs of logic device and by outputs to control inputs of digital regulator and in the logic device there are introduced additional data input coupled to output of additional interval-code converter and feedback input coupled to register output.EFFECT: reduced dynamic stabilisation error.3 dwg
申请公布号 RU2544734(C1) 申请公布日期 2015.03.20
申请号 RU20140108680 申请日期 2014.03.05
申请人 FEDERAL'NOE GOSUDARSTVENNOE BJUDZHETNOE OBRAZOVATEL'NOE UCHREZHDENIE VYSSHEGO PROFESSIONAL'NOGO OBRAZOVANIJA "RYBINSKIJ GOSUDARSTVENNYJ AVIATSIONNYJ TEKHNICHESKIJ UNIVERSITET IMENI P.A. SOLOV'EVA" 发明人 JUDIN ALEKSEJ VIKTOROVICH;SEMENOVA JULIJA VALENTINOVNA;JUDIN VIKTOR VASIL'EVICH
分类号 G05F1/20;H03L5/00 主分类号 G05F1/20
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