发明名称 |
DATA SUPPLY CIRCUIT, ARITHMETIC PROCESSING CIRCUIT, AND DATA SUPPLY METHOD |
摘要 |
An data supply circuit includes a buffer configured to store a plurality of data items each having a first width, a memory access unit configured to read source data stored in memory and to store the source data as one or more data items each having the first width in the buffer, and a selection control unit configured to repeat multiple times an operation of reading a data item having a second width shorter than or equal to the first width to read a plurality of data items each having the second width contiguously and sequentially from the buffer and configured to continue to read from a head end of the source data upon a read portion reaching a tail end of the source data. |
申请公布号 |
US2015081987(A1) |
申请公布日期 |
2015.03.19 |
申请号 |
US201414474711 |
申请日期 |
2014.09.02 |
申请人 |
FUJITSU LIMITED ;FUJITSU SEMICONDUCTOR LIMITED |
发明人 |
GE Yi;HORIO Kazuo;HATANO Hiroshi |
分类号 |
G06F3/06;G06F9/30 |
主分类号 |
G06F3/06 |
代理机构 |
|
代理人 |
|
主权项 |
1. A data supply circuit, comprising:
a buffer configured to store a plurality of data items each having a first width; a memory access unit configured to read source data stored in a memory and to store the source data as one or more data items each having the first width in the buffer; and a selection control unit configured to repeat multiple times an operation of reading a data item having a second width shorter than or equal to the first width to read a plurality of data items each having the second width contiguously and sequentially from the buffer and configured to continue to read from a head end of the source data upon a read portion reaching a tail end of the source data. |
地址 |
Kawasaki-shi JP |