INTEGRATED CIRCUITS WITH SRAM CELLS HAVING ADDITIONAL READ STACKS

摘要

Integrated circuits that include SRAM cells having additional read stacks are provided. In accordance with one embodiment an integrated circuit includes a memory storage array of memory cells. The integrated circuit includes a read stack coupled to each memory cell of the memory storage array. Each read stack includes a read pull-down transistor having a first threshold voltage, and a read pass gate transistor coupled in series with the read pull down transistor and having a second threshold voltage greater than the first threshold voltage.

主权项

1. An integrated circuit comprising:
a memory storage array of memory cells; and a read stack coupled to each memory cell of the memory storage array, each read stack comprising: a read pull-down transistor having a first threshold voltage; and a read pass gate transistor coupled in series with the read pull down transistor and having a second threshold voltage greater than the first threshold voltage.