Stack chip package and method for manufacturing the same

摘要

The present invention relates to a chip stacked semiconductor package and a manufacturing method thereof and, more particularly, to a chip stacked semiconductor package of a new structure and a manufacturing method thereof, capable of easily stacking each semiconductor chip at a wafer level when a substrate is excluded. That is, the present invention provides the chip stacked semiconductor package of the new structure and the manufacturing method thereof, capable of reducing the total thickness of the package by excluding the substrate and a second input/output terminal by forming a rewiring layer which is electrically connected to a through mold via on the lower side of a bottom chip on which a top chip is stacked and attached and fusing a third input/output terminal which is conventionally fused on the substrate on the input/output pad of the rewiring layer.