| 摘要 |
<p>PROBLEM TO BE SOLVED: To suppress a circuit scale of a circuit including an FPGA and also suppress power consumption by enabling a microcomputer to output FPGA data directly to the FPGA.SOLUTION: An FPGA 101 has a debug port 105 allowing a data output source to output data at an arbitrary data output rate. A microcomputer 102 is connected to the debug port 105 of the FPGA 101, and outputs input FPGA data to the debug port 105 of the FPGA 101.</p> |
