发明名称 LOW DENSITY PARITY CHECK ENCODER AND ENCODING METHOD
摘要 The present invention is directed toward a parity check encoder for low density error correction codes and to an encoding method. In accordance with an embodiment, an encoder for error correction coding comprises: first hardware resources configured to receive a message bits vector and to compute an intermediate parity bits vector from the message bits vector wherein the intermediate parity bits vector is computed based on a sub-matrix of a parity check matrix; and second hardware resources configured to compute a parity bits vector from the intermediate parity bits vector, wherein the second hardware resources are configured to compute parity bits for multiple different codes, and wherein portions of the hardware resources that are configured to compute the parity bits for a particular one of the codes are commonly shared with portions of the hardware resources that are configured to compute the parity bits for another particular one of the codes.
申请公布号 US2015082112(A1) 申请公布日期 2015.03.19
申请号 US201314031505 申请日期 2013.09.19
申请人 Antcor S.A. 发明人 Mahdi Ahmed S.;Kanistras Nikolaos L.;Paliouras Vassilis
分类号 H03M13/11 主分类号 H03M13/11
代理机构 代理人
主权项 1. A method of encoding an error correction code, comprising steps of: computing an intermediate parity bits vector from a message bits vector using a sub-matrix of a parity check matrix; and computing a parity bits vector from the intermediate parity bits vector using fixed hardware resources comprising logic gate trees that are configured to compute parity bits for multiple different codes and wherein an arrangement for the hardware resources is determined from a common sub-expression solution such that portions of the hardware resources that are configured to compute the parity bits for a particular one of the codes are commonly shared with portions of the hardware resources that are configured to compute the parity bits for another particular one of the codes.
地址 Athens GR
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