发明名称 METHOD AND APPARATUS FOR STORING A PROCESSOR ARCHITECTURAL STATE IN CACHE MEMORY
摘要 A method includes storing architectural state data associated with a processing unit in a cache memory using an allocate without fill mode. A system includes a processing unit, a cache memory, and a cache controller. The cache controller is to receive architectural state data associated with the processing unit and store at least a first portion of the architectural state data in the cache memory using a first fill mode responsive to a first value of a fill mode flag and store at least a second portion of the architectural state data in the cache memory using a second fill mode responsive to a second value of a fill mode flag, wherein the first fill mode differs from the second fill mode with respect to whether previous values of the architectural state data are retrieved prior to storing the first or second portions in the cache memory.
申请公布号 US2015081980(A1) 申请公布日期 2015.03.19
申请号 US201314028731 申请日期 2013.09.17
申请人 Advanced Micro Devices, Inc. 发明人 Walker William L.
分类号 G06F12/08 主分类号 G06F12/08
代理机构 代理人
主权项 1. A method comprising: storing architectural state data associated with a processing unit in a cache memory using an allocate without fill mode.
地址 Sunnyvale CA US