发明名称 Semiconductor Device and Manufacturing Method Thereof
摘要 Provided are a semiconductor device in which the occurrence of a short circuit between a gate electrode and either of the source/drain regions of a transistor can be suppressed and a manufacturing method thereof. In the semiconductor device, a first insulating layer formed over the gate electrode and containing a silicon nitride has an upper surface having a depressed portion which is formed in a region over a second electrode layer of the gate electrode containing a silicide.
申请公布号 US2015076611(A1) 申请公布日期 2015.03.19
申请号 US201414462335 申请日期 2014.08.18
申请人 Renesas Electronics Corporation 发明人 MAKI Yukio
分类号 H01L27/11;H01L29/51 主分类号 H01L27/11
代理机构 代理人
主权项 1. A semiconductor device, comprising: a semiconductor substrate having a main surface; a gate electrode formed over the main surface of the semiconductor substrate; a side-wall oxide film formed over a side wall of the gate electrode; and a first insulating layer formed over the gate electrode and containing a silicon nitride, wherein the gate electrode includes a first electrode layer containing silicon, and a second electrode layer formed over the first electrode layer and containing a silicide, and wherein the first insulating layer has an upper surface opposite to the main surface and having a depressed portion formed in a region over the second electrode layer.
地址 Kawasaki-shi JP