| 摘要 |
<p> An IGBT part (10) on which an IGBT is arranged and a circuit part (20) in which a control circuit is arranged are arranged on the same semiconductor chip. A dielectric separation region (40) is arranged on the circuit part (20) at the boundary with the IGBT part (10). A p+-type region (4) is provided on an obverse-surface-side surface layer of the semiconductor chip from the IGBT part (10) to the circuit part (20). A dielectric separation layer (5) is provided to the circuit part (20) at the boundary with the IGBT part (10) from the chip obverse surface through the p+-type region (4) to a depth reaching an n--type drift region (3), the dielectric separation layer (5) constituting the dielectric separation region (40). The p+-type region (4) is divided by the dielectric separation layer (5) into a first p+-type region (4-1) on the IGBT part (10)-side and a second p+-type region (4-2) on the circuit part (20)-side. The first and second p+-type regions (4-1, 4-2) are at a ground potential. It is thereby possible to reduce the size and the cost of the circuit as a whole.</p> |
