| 摘要 |
Full-bridge amplifier output stage (200) with (each side of bridge) two transistors (M1PSW, M2PSW) connected to the amplifier output (O1) and driven by the same terminal (DT1) of a bias circuit (210), one of which connected to a supply (VDD), the other one to another terminal (N1) of the bias circuit; and other two transistors (M1NSW, M2NSW) connected to the amplifier output and driven by the same terminal (DT2) of a second bias circuit (220), one of which connected to a second supply (GND), the other one to another terminal (N4) of the second bias circuit. For switching amplifier; to control the gate voltage of the output FETs in the ON-state, to maintain a controlled or constant rDS(on) of the FETs. |
