发明名称 半導体テスト治具およびそれを用いた耐圧測定方法
摘要 <p>A jig for use in a semiconductor test of the present invention includes; a base on which a probe pin and an insulating material are provided such that the probe pin is surrounded by the insulating material in plan view; and a stage arranged to face a surface of the base on which the probe pin and the insulating material are provided. The stage is capable of receiving a test object placed on a surface facing the base. When the test object is placed on the stage and the base and the stage move in a direction in which they get closer to each other, the probe pin comes into contact with an electrode formed on the test object, and the insulating material comes into contact with both the test object and the stage.</p>
申请公布号 JP5687172(B2) 申请公布日期 2015.03.18
申请号 JP20110239841 申请日期 2011.11.01
申请人 发明人
分类号 G01R31/26;G01R1/06 主分类号 G01R31/26
代理机构 代理人
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