| 发明名称 |
PROCESSOR DEVICE WITH RESET CONDITION TRACE CAPABILITIES |
| 摘要 |
<p>A processor device with debug capabilities has a central processing unit, debug circuitry including a trace module, a system clock module for providing internal clock signals, and a reset detection unit which during a debug mode prevents the system clock module from receiving a reset signal.</p> |
| 申请公布号 |
EP2847682(A1) |
申请公布日期 |
2015.03.18 |
| 申请号 |
EP20130726614 |
申请日期 |
2013.05.07 |
| 申请人 |
MICROCHIP TECHNOLOGY INCORPORATED |
发明人 |
MILKS, JUSTIN;PERME, THOMAS, EDWARD;BALASUBRAMANIAN, SUNDAR;JAVAGAL, KUSHALA |
| 分类号 |
G06F11/36 |
主分类号 |
G06F11/36 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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