Semiconductor memory devices

摘要

A semiconductor memory device includes a substrate, a well region in the substrate, a patterned first dielectric layer on the substrate extending over the well region, a patterned first gate structure on the patterned first dielectric layer, a patterned second dielectric layer on the patterned first gate structure, and a patterned second gate structure on the patterned second dielectric layer. The patterned first gate structure includes a first section extending in a first direction and a second section extending in a second direction orthogonal to the first section, the first section and the second section intersecting each other in a cross pattern. The patterned second gate structure includes at least one of a first section extending in the first direction over the first section of the patterned first gate structure or a second section extending in the second direction over the second section of the patterned first gate structure.

主权项

1. A semiconductor memory device comprising:
a substrate; a well region in the substrate having a same impurity type as the substrate; a patterned first dielectric layer on the substrate extending over the well region; a patterned first gate structure on the patterned first dielectric layer, the patterned first gate structure including a first section extending in a first direction and a second section extending in a second direction orthogonal to the first section, the first section and the second section intersecting each other in a cross pattern, wherein the second section of the patterned first gate structure has a first side and a second side opposite to the first side; a patterned second dielectric layer on the patterned first gate structure; a patterned second gate structure on the patterned second dielectric layer, the patterned second gate structure including at least one of a first section extending in the first direction over the first section of the patterned first gate structure or a second section extending in the second direction over the second section of the patterned first gate structure; and lightly doped drain (LDD) regions at the second side of the second section of the patterned first gate structure in the well region at both sides of the patterned first gate structure.