Row decoder circuit for a phase change non-volatile memory device

摘要

A row decoder circuit for a phase change non-volatile memory device may include memory cells arranged in a wordlines. The device may be configured to receive a first supply voltage and a second supply voltage higher than the first supply voltage. The row decoder may include a global predecoding stage configured to receive address signals and generate high-voltage decoded address signals in a range of the second supply voltage and a biasing signal with a value based upon an operation. The row decoder may include a row decoder stage coupled to the global predecoding stage. The row decoder stage may include a selection driving unit configured to generate block-address signals based upon the high-voltage decoded address signals and a row-driving unit configured to generate a row-driving signal for biasing the wordlines based upon the block-address signals and the biasing signal.

主权项

1. A row decoder circuit for a phase change non-volatile memory device comprising a plurality of memory cells arranged in a plurality of wordlines, the phase change non-volatile memory device configured to receive a first supply voltage and a second supply voltage higher than the first supply voltage, the row decoder comprising:
a global predecoding stage configured to
receive address signals, andgenerate high-voltage decoded address signals in a range of the second supply voltage and a biasing signal with a value based upon an operation to be carried out; and at least one row decoder stage coupled to the global predecoding stage and comprising
a selection driving unit configured to generate block-address signals based upon the high-voltage decoded address signals, anda row-driving unit configured to generate a row-driving signal for biasing at least one of the plurality of wordlines based upon the block-address signals and the biasing signal.