发明名称 |
Image processing apparatus and control method therefor |
摘要 |
An image processing apparatus which re-encodes encoded data, encoded with a pixel block having a predetermined number of pixels as a coding unit, while suppressing degradation of image quality, with a higher compressibility. For this purpose, when an encoded-image-data input unit inputs JPEG encoded data with an 8×8 pixel block as a coding unit, a redundancy estimation unit performs encoding on the encoded data, and sets an encoded data amount obtained by the coding, as a target code amount for a recompressor to perform coding in accordance with JPEG 2000 coding. The inputted encoded data is decompressed by a decompressor, and the recompressor generates encoded data in the previously-determined target code amount. The code amount control is performed by deleting the encoded data in bit planes in an order from a least significant bit plane toward a high-order bit plane. |
申请公布号 |
US8983219(B2) |
申请公布日期 |
2015.03.17 |
申请号 |
US201213362625 |
申请日期 |
2012.01.31 |
申请人 |
Canon Kabushiki Kaisha |
发明人 |
Kishi Hiroki;Shiraishi Yuki;Ito Naoki |
分类号 |
G06K9/36;G06K9/46;H04N19/40;H04N19/132;H04N19/146;H04N19/18;H04N19/635 |
主分类号 |
G06K9/36 |
代理机构 |
Fitzpatrick, Cella, Harper & Scinto |
代理人 |
Fitzpatrick, Cella, Harper & Scinto |
主权项 |
1. An image processing apparatus which re-encodes encoded data, encoded in accordance with a first coding algorithm, with a pixel block having a predetermined number of pixels as a unit, comprising:
an input unit to input encoded data encoded in accordance with the first coding algorithm as a re-encoding subject; a second encoder, based on a second coding algorithm, to perform coding of an image with a block in a larger size than said pixel block in the first coding algorithm as a unit; a redundancy estimation unit to estimate a redundancy of coded data coded in accordance with the first encoding algorithm by performing lossless coding of the coded data without decoding the coded data in accordance with a third coding algorithm different from the first and second coding algorithms; a target code amount calculation unit to cause said redundancy estimation unit to estimate the redundancy of the encoded data inputted by said input unit and to calculate, from the estimated redundancy of the encoded data inputted by said input unit, a target code amount with respect to said second encoder; and a controller to decode the encoded data inputted by said input unit to obtain a decoded image and to cause said second encoder to encode the decoded image to generate encoded data in said target code amount calculated by said target code amount calculation unit, wherein at least one of the second encoder, the redundancy estimate unit, the target code amount calculation unit, and the controller, is included in a computer processor. |
地址 |
Tokyo JP |