发明名称 |
Methods of forming a semiconductor device |
摘要 |
Methods of forming a semiconductor device are provided. The methods may include forming first and second layers that are alternately and repeatedly stacked on a substrate, and forming an opening penetrating the first and second layers. The methods may also include forming a first semiconductor pattern in the opening. The methods may additionally include forming an insulation pattern on the first semiconductor pattern. The methods may further include forming a second semiconductor pattern on the insulation pattern. The methods may also include providing dopants in the first semiconductor pattern. Moreover, the methods may include thermally treating a portion of the first semiconductor pattern to form a third semiconductor pattern. |
申请公布号 |
US8980731(B2) |
申请公布日期 |
2015.03.17 |
申请号 |
US201213724632 |
申请日期 |
2012.12.21 |
申请人 |
Samsung Electronics Co., Ltd. |
发明人 |
Kim Jung Ho;Lee Sunghae;Yang Hanvit;Kim Dongwoo;Kim Chaeho;Jang Daehyun;Kim Ju-Eun;Son Yong-Hoon;Yang Sangryol;Lee Myoungbum;Hwang Kihyun |
分类号 |
H01L21/04;H01L21/82;H01L21/336;H01L21/3205;H01L29/76;H01L29/792;H01L27/115;H01L29/66 |
主分类号 |
H01L21/04 |
代理机构 |
Myers Bigel Sibley & Sajovec, PA |
代理人 |
Myers Bigel Sibley & Sajovec, PA |
主权项 |
1. A method of forming a semiconductor device comprising:
forming sacrificial layers and insulating layers that are alternately and repeatedly stacked on a substrate; forming a channel opening penetrating the sacrificial layers and the insulating layers, the channel opening exposing a top surface of the substrate; forming a first semiconductor pattern conformally covering an inner sidewall of the channel opening; forming an insulation pattern on the first semiconductor pattern and in the channel opening; forming a second semiconductor pattern on the insulation pattern to substantially fill the channel opening; injecting dopants into the first semiconductor pattern; and melting a portion of the first semiconductor pattern adjacent an uppermost one of the sacrificial layers to form a third semiconductor pattern. |
地址 |
KR |