发明名称 Radiographic image detector and controlling method therefor
摘要 A flat panel detector has pixels for obtaining image signals and detective pixels for detecting the amount of incident x-rays. A signal processing circuit is of a pipeline-type, wherein first and second buffer memories are connected to the output of an A/D converter. In a dose detecting operation, the signal processing circuit repeats primary cycles alternately with secondary cycles of a shorter length than the primary cycles. In the primary cycle, a dose detection signal based on electric charges from the detective pixels is input in the first buffer memory and, simultaneously, a dummy signal is output from the second buffer memory. In secondary cycle, the dose detection signal is output from the first buffer memory and, simultaneously, a second dummy signal is input in the second buffer memory. On the basis of the dose detection signals, a start-of-radiation detector detects the start of x-ray radiation.
申请公布号 US8983035(B2) 申请公布日期 2015.03.17
申请号 US201213683428 申请日期 2012.11.21
申请人 FUJIFILM Corporation 发明人 Noma Kentaro;Nakamura Kenji;Iwakiri Naoto;Kitano Kouichi;Watanabe Keita
分类号 G01T1/24;G01T1/16;H01L27/146;H05G1/64;G01T1/17;H04N5/32;A61B6/00 主分类号 G01T1/24
代理机构 Birch, Stewart, Kolasch & Birch, LLP 代理人 Birch, Stewart, Kolasch & Birch, LLP
主权项 1. A radiographic image detector for detecting radiographic images of a subject, comprising: a flat panel detector having an imaging area in which a plurality of columns of pixels for accumulating electric charges corresponding to the amounts of radioactive rays incident on the pixels, a dose sensor generating electric charges corresponding to the amount of radiated radioactive rays radiated from a radiation source, and signal lines provided for respective columns of the pixels are arranged in an array, wherein the pixels and the dose sensor are connected to the signal lines to output the electric charges accumulated in the pixels as image signals and the electric charges generated from the dose sensor as a dose detection signal through the signal lines; a pipeline-type signal processing circuit comprising a plurality of integrating amplifiers provided for the respective signal lines, to integrate and convert electric charges to voltage signals, and first and second signal holding devices for temporarily holding two sets of voltage signal as successively read out from the integrating amplifiers, wherein a set of voltage signal is being input to one of the first and second signal holding devices while a preceding set of voltage signal is being output from the other of the first and second signal holding devices; a memory for storing the image signal and the dose detection signal as voltage signals output from the signal processing circuit; and a controller for controlling operation timings of the flat panel detector, the signal processing circuit and the memory, wherein the controller controls the signal input and output of the first and second signal holding devices to be repeated in ordinary cycles of a constant length, which corresponds to an integrating session from a start of integration of electric charges till resetting the integrating amplifiers, in a reading operation for outputting the image signal to the memory, whereas the controller controls the signal input and output of the first and second signal holding devices to be repeated in two kinds of cycles, including primary cycles and secondary cycles of a shorter length than the primary cycles, in such a manner that at least one secondary cycle is conducted in between two primary cycles in a dose detecting operation for outputting the dose detection signal to the memory.
地址 Tokyo JP