发明名称 |
Programming methods and memories |
摘要 |
Memory devices and programming methods for memories are disclosed, such as those adapted to program a memory using an increasing channel voltage for a first portion of programming, and an increasing but reduced channel voltage for a second portion of programming. |
申请公布号 |
US8982631(B2) |
申请公布日期 |
2015.03.17 |
申请号 |
US201012702948 |
申请日期 |
2010.02.09 |
申请人 |
Micron Technology, Inc. |
发明人 |
Zhao Yijie;Goda Akira |
分类号 |
G11C11/34;G11C16/04;G11C16/10;G11C16/34 |
主分类号 |
G11C11/34 |
代理机构 |
Dicke, Billig & Czaja, PLLC |
代理人 |
Dicke, Billig & Czaja, PLLC |
主权项 |
1. A method of programming a memory, comprising:
boosting a channel voltage for a first portion of a plurality of programming pulses with a first inhibit voltage waveform; and when a criteria is met, boosting the channel voltage differently for a second portion of the plurality of programming pulses with a different inhibit voltage waveform; wherein boosting the channel voltage for the first portion of the plurality of programming pulses comprises applying a local self-boosting scheme, the local self-boosting scheme comprising: applying inhibit voltage pulses greater than 0 volts to two access lines immediately adjacent to and on a drain side of an access line receiving the programming pulses; applying inhibit voltage pulses greater than 0 volts to two access lines immediately adjacent to and on a source side of the access line receiving the programming pulses; grounding an access line adjacent to the two access lines on the drain side; and grounding an access line adjacent to the two access lines on the source side; wherein a channel voltage when an initial program pulse of the second portion of the plurality of programming pulses is applied is less than a channel voltage when a final program pulse of the first portion of the plurality of programming pulses is applied. |
地址 |
Boise ID US |