发明名称 Semiconductor device
摘要 A semiconductor device includes a multi-level wiring structure that includes a first wring layer, a plurality of first patterns, and a first mark. The first wring layer is disposed at a first wiring level of the multi-level wiring structure. The plurality of first patterns is disposed over the first wring layer. The plurality of first patterns is disposed at a second wiring level of the multi-level wiring structure. The second wiring level is above the first wiring level. The plurality of first patterns is disposed over the first wring layer. The plurality of first patterns is disposed at a second wiring level of the multi-level wiring structure. The second wiring level is above the first wiring level. The first mark is disposed over the first wring layer. The first mark is disposed at a third wiring level. The third wiring level is above the second wiring level.
申请公布号 US8981558(B2) 申请公布日期 2015.03.17
申请号 US201213440583 申请日期 2012.04.05
申请人 PS4 Luxco S.a.r.l. 发明人 Ide Akira
分类号 H01L23/48;H01L23/498;H01L23/544;H01L25/065;H01L21/768;H01L23/522;H01L25/00 主分类号 H01L23/48
代理机构 McGinn IP Law Group, PLLC 代理人 McGinn IP Law Group, PLLC
主权项 1. A semiconductor device comprising: a multi-level wiring structure including: a first wiring layer disposed at a first wiring level of the multi-level wiring structure;a plurality of first dummy patterns disposed over and covering the first wiring layer, each first dummy pattern of the plurality of first dummy patterns comprising a size which is substantially less than a size of the first wiring layer, and the plurality of first dummy patterns being disposed at a second wiring level of the multi-level wiring structure, the second wiring level being above the first wiring level; anda first mark disposed over the first wiring layer, the first mark being disposed at a third wiring level of the multi-level wiring structure, the third wiring level being above the second wiring level.
地址 Luxembourg LU
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