Signal processing circuit and signal processing method

摘要

A signal processing circuit includes: a delay line configured to output, to a plurality of taps, signals with different delay times obtained by delaying an input signal, respectively; and a plurality of synchronization circuits configured to sample the signals from the plurality of taps in a phase in synchronization with a clock signal, wherein each of the plurality of synchronization circuits samples a sample signal from one of the plurality of taps in different phases and outputs a plurality of output signals.

主权项

1. A signal processing circuit comprising:
a delay line configured to output, to a plurality of taps, signals with different delay times obtained by delaying an input signal, respectively; and a plurality of synchronization circuits configured to sample the signals from the plurality of taps in a phase in synchronization with a clock signal, wherein each of the plurality of synchronization circuits samples a sample signal from one of the plurality of taps in different phases and outputs a plurality of output signals, wherein the plurality of synchronization circuits sample the signals from the plurality of taps, output sampled signals and include a plurality of analog-digital converters that perform analog-to-digital conversion of the sampled signals.