发明名称 Performing arithmetic operations using both large and small floating point values
摘要 Mechanisms are provided for performing a floating point arithmetic operation in a data processing system. A plurality of floating point operands of the floating point arithmetic operation are received and bits in a mantissa of at least one floating point operand of the plurality of floating point operands are shifted. One or more bits of the mantissa that are shifted outside a range of bits of the mantissa of at least one floating point operand are stored and a vector value is generated based on the stored one or more bits of the mantissa that are shifted outside of the range of bits of the mantissa of the at least one floating point operand. A resultant value is generated for the floating point arithmetic operation based on the vector value and the plurality of floating point operands.
申请公布号 US8984041(B2) 申请公布日期 2015.03.17
申请号 US201213598847 申请日期 2012.08.30
申请人 International Business Machines Corporation 发明人 Carter John B.;Mealey Bruce G.;Rajamani Karthick;Retter Eric E.;Stuecheli Jeffrey A.
分类号 G06F7/38;G06F7/483 主分类号 G06F7/38
代理机构 代理人 Walder, Jr. Stephen J.;Tyson Thomas E.
主权项 1. A method, in a data processing system, for performing a floating point arithmetic operation, comprising: receiving, in hardware logic of the data processing system, a plurality of floating point operands of the floating point arithmetic operation; shifting, by the hardware logic, bits in a mantissa of at least one floating point operand of the plurality of floating point operands; storing, by the hardware logic, one or more bits of the mantissa that are shifted outside a range of bits of the mantissa of the at least one floating point operand; generating, by the hardware logic, a vector value based on the stored one or more bits of the mantissa that are shifted outside the range of bits of the mantissa of the at least one floating point operand; and generating, by the hardware logic, a resultant value for the floating point arithmetic operation based on the vector value and the plurality of floating point operands, wherein: storing one or more bits of the mantissa that are shifted outside a range of bits of the mantissa of the at least one floating point operand comprises setting bits in bit positions of a separate register corresponding to the one or more bits of the mantissa shifted outside the range of bits of the mantissa,each bit position in the separate register has a different associated probability weight, andgenerating the vector value based on the storing one or more bits of the mantissa that are shifted outside the range of bits of the mantissa of the at least one floating point operand comprises generating the vector value based on probability weights associated with bit positions having corresponding bit values set in the separate register.
地址 Armonk NY US