发明名称 |
Driver circuit |
摘要 |
A pair of PWM signals having mutually opposite or identical phases is applied to both terminals of a load to drive the load. An anomaly detection circuit detects a state of change in the pair of PWM signals (PWM+ and PWM−), performs counting operation when at least one PWM signal stops changing, and outputs an anomaly detection signal when the count value becomes a predetermined value. |
申请公布号 |
US8983095(B2) |
申请公布日期 |
2015.03.17 |
申请号 |
US201213355026 |
申请日期 |
2012.01.20 |
申请人 |
Semiconductor Components Industries, LLC |
发明人 |
Matsumoto Yoshitaka |
分类号 |
H02B1/00;H04R3/00 |
主分类号 |
H02B1/00 |
代理机构 |
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代理人 |
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主权项 |
1. A driver circuit for driving a load by applying first and second digital PWM signals to the load, comprising an anomaly detection circuit, the anomaly detection circuit comprising:
a first no-edge detection circuit for activating a first no-edge detection signal in response to detecting that the first digital PWM signal changes state within a first predetermined period of time; a second no-edge detection circuit for activating a second no-edge detection signal in response to detecting that the second digital PWM signal changes state within said first predetermined period of time; and a logic circuit for activating a reset signal in response to both said first and second no-edge detection signals being inactive, wherein the logic circuit further has an input for receiving a coincidence signal indicative of a coincidence in logic state of said first and second digital PWM signals when said first and second no-edge detection signals are inactive, the anomaly detection circuit outputting an anomaly detection signal in response to said reset signal being inactive for a second predetermined period of time. |
地址 |
Phoenix AZ US |