| 发明名称 | Chip die and semiconductor memory device including the same | ||
| 摘要 | A chip die including a first input/output (I/O) pad configured to transmit/receive an I/O signal of a memory cell array included in the chip die; a second I/O pad configured to, if a stacked chip die exists on the chip die, transmit/receive a via I/O signal of the stacked chip die, and configured to, if the stacked chip die does not exist on the chip die, transmit/receive a differential I/O signal of the chip die; and an I/O driver configured to receive an operation mode signal including information as to whether the stacked chip die exists on the chip die in such a manner that the second I/O pad is configured to transmit/receive the via I/O signal or the differential I/O signal. | ||
| 申请公布号 | US8982599(B2) | 申请公布日期 | 2015.03.17 |
| 申请号 | US201313948616 | 申请日期 | 2013.07.23 |
| 申请人 | SK Hynix Inc. | 发明人 | Jeon Seon Kwang;Ryu Sung Soo;Kim Chang Il |
| 分类号 | G11C5/06;G11C5/04;G11C7/10 | 主分类号 | G11C5/06 |
| 代理机构 | William Park & Associates Patent Ltd. | 代理人 | William Park & Associates Patent Ltd. |
| 主权项 | 1. A chip die comprising: a first input/output (I/O) pad configured to transmit/receive an I/O signal of a memory cell array included in the chip die; a second I/O pad configured to, if a stacked chip die exists on the chip die, transmit/receive a via I/O signal of the stacked chip die, and configured to, if the stacked chip die does not exist on the chip die, transmit/receive a differential I/O signal of the chip die; and an I/O driver configured to receive an operation mode signal including information as to whether the stacked chip die exists on the chip die in such a manner that the second I/O pad is configured to transmit/receive the via I/O signal or the differential I/O signal. | ||
| 地址 | Gyeonggi-do KR | ||