发明名称 Electrostatic discharge protection apparatus
摘要 An electrostatic discharge (ESD)-triggered protection apparatus includes a first circuit and a second circuit. The first circuit includes an ESD trigger circuit to sense an ESD pulse and to generate a switching pulse responsive to the ESD pulse; a first ESD discharge device communicatively coupled to the ESD trigger circuit and responsive to the switching pulse to transfer a current generated by the ESD pulse to the ground rail; a control circuit that generates a control signal in response to the switching pulse. The second circuit includes at least one trigger cell buffer that is configured to receive the control signal and to control a second ESD discharge device such that the current generated by the ESD pulse is transferred to the ground rail.
申请公布号 US8982517(B2) 申请公布日期 2015.03.17
申请号 US201313756243 申请日期 2013.01.31
申请人 Texas Instruments Incorporated 发明人 Torres Cynthia Ann;Rost Timothy Alan;Sundaramoorthy Senthil Kumar;Nuss Victor James
分类号 H02H9/04 主分类号 H02H9/04
代理机构 代理人 Pessetto John R.;Cimino Frank D.
主权项 1. An electrostatic discharge (ESD)-triggered protection apparatus, comprising: a first circuit comprising: an ESD trigger circuit to sense an ESD pulse and to generate a switching pulse responsive to the ESD pulse;a first ESD discharge device communicatively coupled to the ESD trigger circuit and responsive to the switching pulse to transfer a current generated by the ESD pulse to a ground rail;a control circuit that generates a control signal in response to the switching pulse;at least one inverting buffer communicatively coupled between the ESD trigger circuit and the first ESD discharge device to propagate the switching pulse from the ESD trigger circuit to the first ESD discharge device, wherein the at least one inverting buffer further includes first, second, and third inverters, each inverter comprising a PMOS transistor coupled to a VDD voltage rail and an NMOS transistor coupled to the ground rail, the NMOS transistor associated with the third inverter having a long, narrow-width channel to provide resistance characteristics; and a second circuit comprising: at least one trigger cell buffer that is configured to receive the control signal and to control a second ESD discharge device such that the current generated by the ESD pulse is transferred to the ground rail.
地址 Dallas TX US