Dynamically generating jog patches for jog violations

摘要

Systems, methods, and other embodiments associated with dynamically generating jog patches are described. In one embodiment, a method includes determining a virtual edge within metal of a design at a jog rule violation. The design is a design of an integrated circuit and the virtual edge is an edge of a rectangle associated with one or more edges of the jog rule violation. The example method may also include dynamically generating a jog patch by expanding the metal from the virtual edge.

主权项

1. A non-transitory computer-readable medium storing computer-executable instructions that when executed by a computer cause the computer to perform a method, the method comprising:
identifying a jog rule violation in a design for an integrated circuit, wherein the jog rule violation includes a first edge and a second edge that are consecutive edges of metal in a metal layer of the design; determining a virtual edge within the metal from which to expand an area of the metal, wherein the virtual edge is an edge of a rectangle associated with one or more edges of the jog rule violation; dynamically generating a jog patch by expanding the metal from the virtual edge; and transforming the design of the metal at the jog rule violation using the jog patch, wherein determining the virtual edge when the jog rule violation is concave includes:
determining an abutting edge of the metal that abuts the first edge, wherein the first edge is aligned in a routing direction of the metal and the abutting edge is perpendicular to the routing direction, wherein the abutting edge is a third consecutive edge of the metal that is not the first edge or the second edge of the jog rule violation; andidentifying the virtual edge from a bounding box as an edge of the bounding box opposite to the abutting edge, wherein the bounding box is defined by the abutting edge and the first edge.