发明名称 Line speed sequential transaction packet processing
摘要 Methods and systems for processing transaction packets at a serial interface are disclosed. The method includes receiving transaction information at a serial interface. The method further includes executing one or more pipelined operations based on the transaction information, where the operations relate to processing of the transaction packet. The method is performed such that the serial interface is configured to send and receive transaction packets at a line speed of the serial bus.
申请公布号 US8984193(B1) 申请公布日期 2015.03.17
申请号 US200711879355 申请日期 2007.07.17
申请人 Unisys Corporation 发明人 Cavanagh Edward T.;Shah Arun
分类号 G06F13/42 主分类号 G06F13/42
代理机构 代理人 Gregson Richard J.
主权项 1. A method of processing transaction packets received on a serial bus, the method comprising: receiving transaction packet validation information comprising error detection and correction information, at a serial interface; and executing one or more pipelined operations based on the transaction packet validation information, the operations relating to processing of a transaction packet; wherein the serial interface is configured to receive transaction packets at a line speed of the serial bus.
地址 Blue Bell PA US