| 摘要 |
<p>The present invention is to provide a test circuit to support an efficient test by minimizing the time required to test a semiconductor device equipped with a bump pad. The semiconductor device equipped with a bump pad of the present invention comprises: a plurality of bump pads; a plurality of data input/output units to input and output each data through a plurality of global input/output lines between each of the bump pads and an internal circuit; a connection control unit connecting the bump pads in a chain shape in a test operation section, but not connecting in a normal operation section; and a test operation unit controlling each of the data input/output units to input/output test data in a preset order so that the test data passes each of the bump pads in a preset order in the test operation section.</p> |
