| 发明名称 |
CONTROL APPARATUS, CONTROL SYSTEM AND CONTROL METHOD |
| 摘要 |
According to certain embodiment, there is provided a control apparatus including a processor. The processor controls a first processing unit. The processor acquires determination information for estimating a time delay till execution of a first process is started, in response to receiving an interrupt request for the first process related to the first processing unit from a program being executed underway by the processor or from hardware connected via a bus to the processor, and determines whether to execute the first process or not based on the determination information. |
| 申请公布号 |
US2015074673(A1) |
申请公布日期 |
2015.03.12 |
| 申请号 |
US201414203940 |
申请日期 |
2014.03.11 |
| 申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
TOHZAKA Yuji;KUDO Hiroki;SAKAMOTO Takafumi;DEGUCHI Noritaka |
| 分类号 |
G06F9/46 |
主分类号 |
G06F9/46 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A control apparatus comprising:
a processor configured to control a first processing unit, wherein the processor acquires determination information for estimating a time delay till execution of a first process is started, in response to receiving an interrupt request for the first process related to the first processing unit from a program being executed underway by the processor or from hardware connected via a bus to the processor, and determines whether to execute the first process or not based on the determination information. |
| 地址 |
Tokyo JP |
