发明名称 BACKSIDE MOLD PROCESS FOR ULTRA THIN SUBSTRATE AND PACKAGE ON PACKAGE ASSEMBLY
摘要 In some embodiments, selective electroless plating for electronic substrates is presented. In this regard, a method is introduced including receiving a coreless substrate strip, forming a stiffening mold on a backside of the coreless substrate strip adjacent to sites where solder balls are to be attached, and attaching solder balls to the backside of the coreless substrate strip amongst the stiffening mold. Other embodiments are also disclosed and claimed.
申请公布号 US2015072474(A1) 申请公布日期 2015.03.12
申请号 US201414486849 申请日期 2014.09.15
申请人 Intel Corporation 发明人 Sim Huay Huay;Chee Choong Kooi;Liew Kein Fee
分类号 H01L21/56;H01L23/00;H01L25/00 主分类号 H01L21/56
代理机构 代理人
主权项 1. A method comprising: receiving a coreless substrate strip; and forming a stiffening mold on a backside of the coreless substrate strip adjacent to sites where solder balls are to be attached; and attaching solder balls to the backside of the coreless substrate strip amongst the stiffening mold.
地址 Santa Clara CA US