MEMORY DEVICE COMPRISING DOUBLE CASCODE SENSE AMPLIFIERS

摘要

A memory device comprising a memory array comprising a plurality of memory cells, a plurality of bitlines and a plurality of wordlines for writing to the plurality of memory cells and a sense amplifier coupled to a first bitline of the plurality of bitlines, for reading the contents of a selected memory cell, the sense amplifier comprising a first cascode transistor pair coupled to a second cascode transistor pair, the first cascode transistor pair coupled to the first bitline and a second bitline, and a current comparator coupled to a drain side of the second cascode transistor pair for determining a value of the selected memory cell.

主权项

1. A memory device comprising:
a memory array comprising a plurality of memory cells; a plurality of bitlines and a plurality of wordlines for writing to the plurality of memory cells; and a sense amplifier coupled to a first bitline of the plurality of bitlines, for reading the contents of a selected memory cell, the sense amplifier comprising:
a first cascode transistor pair coupled to a second cascode transistor pair, the first cascode transistor pair coupled to the first bitline and a second bitline; anda current comparator coupled to a drain side of the second cascode transistor pair for determining a value of the selected memory cell.