| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a communication circuit having different timing between a plurality of sets of serial-to-parallel conversion processing.SOLUTION: A communication circuit 1 includes a plurality of reception units, a plurality of serial-to-parallel converter units 161-164, and a reception clock phase control unit 41. The plurality of reception units respectively receive serial signals from other devices through transmission lines. The plurality of serial-to-parallel converter units 161-164 respectively convert the received serial signals into parallel signals. The reception clock phase control unit 41 transmits a clock phase control signal to one of the serial-to-parallel converter units 161-164. The serial-to-parallel converter unit, on receiving the clock phase control signal, shifts the clock signal phase to be used for the converted parallel signals in a manner to differentiate a parallel signal phase converted thereby from each parallel signal phase converted by other serial-to-parallel converter units.</p> |
