3D CHIP CRACKSTOP

摘要

Embodiments of the present invention provide a crackstop and seal ring for 3D chip stacked wafers. A continuous through-silicon trench (TST) spans multiple wafers of a 3D chip stacked wafer, and forms a closed shape around a functional circuit or die, protecting the chip during subsequent fabrication such as dicing and packaging.

主权项

1. A method of forming a crackstop on a 3D semiconductor structure, the 3D semiconductor structure comprising a first wafer having a substrate and a back-end-of-line (BEOL) region, a second wafer having a substrate and a back-end-of-line (BEOL) region, wherein the second wafer is disposed on the first wafer, the method comprising:
forming a through-silicon-trench (TST) in a closed shape around a circuit formed in the 3D semiconductor structure, wherein the TST traverses the second wafer, and extends through the BEOL region of the first wafer, and partially into the substrate of the first wafer.