| 发明名称 |
APPARATUS AND METHOD FOR COMPUTER DEBUG |
| 摘要 |
A computer debug module for use in a computer at least includes a power sequence monitor module. The power sequence monitor module includes a monitor unit, a register, and an output control unit. The monitor unit is configured to monitor a plurality of power sequence signals relative to the computer and generate a monitor result. The register is configured to store the monitor result. When the power sequence monitor module operates in a debug mode, the output control unit generates a detection signal according to the stored monitor result and transmits the detection signal to an output device. |
| 申请公布号 |
US2015074460(A1) |
申请公布日期 |
2015.03.12 |
| 申请号 |
US201314075583 |
申请日期 |
2013.11.08 |
| 申请人 |
NUVOTON TECHNOLOGY CORPORATION |
发明人 |
YEH Shih-Hao;YEN Shih-Hsuan |
| 分类号 |
G06F11/22 |
主分类号 |
G06F11/22 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A computer debug module for use in a computer, comprising:
a power sequence monitor module, comprising:
a monitor unit, monitoring a plurality of power sequence signals relative to the computer, and generating a monitor result;a register, storing the monitor result; andan output control unit, wherein when the power sequence monitor module operates in a debug mode, the output control unit generates a detection signal according to the stored monitor result and transmits the detection signal to an output device. |
| 地址 |
Hsinchu TW |
