发明名称 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME
摘要 According to one embodiment, a nonvolatile semiconductor memory device includes: an interlayer insulating film; an element separating region separating a semiconductor layer in the memory cell region; a gate electrode provided on one of plurality of semiconductor regions in the memory cell region; a contact electrode having a sidewall in contact with the interlayer insulating film and electrically connected to the one of the plurality of semiconductor regions in the memory cell region; a first wiring layer connected to an upper end of the contact electrode in the memory cell region; and a second wiring layer in a third direction, having an upper end higher than the upper end of the contact electrode, having a lower end lower than the upper end of the contact electrode, and having a sidewall at least partly in contact with the interlayer insulating film in the peripheral region.
申请公布号 US2015069491(A1) 申请公布日期 2015.03.12
申请号 US201414163300 申请日期 2014.01.24
申请人 Kabushiki Kaisha Toshiba 发明人 IIJIMA Jun;HIMENO Yoshiaki;USUI Takamasa
分类号 H01L29/788;H01L29/423 主分类号 H01L29/788
代理机构 代理人
主权项 1. A nonvolatile semiconductor memory device comprising: a semiconductor layer provided in a memory cell region and a peripheral region at a periphery of the memory cell region; an interlayer insulating film provided above the semiconductor layer; an element separating region separating the semiconductor layer into a plurality of semiconductor regions in the memory cell region; a gate electrode provided on one of the plurality of semiconductor regions via a gate insulating film in the memory cell region; a contact electrode extending in a first direction from the semiconductor layer toward the interlayer insulating film, the contact electrode having a sidewall in contact with the interlayer insulating film, and the contact electrode being electrically connected to the one of the plurality of semiconductor regions in the memory cell region; a first wiring layer connected to an upper end of the contact electrode, and the first wiring layer extending in a second direction crossing the first direction in the memory cell region; and a second wiring layer extending in a third direction crossing the first direction, the second wiring layer having an upper end higher than the upper end of the contact electrode, the second wiring layer having a lower end lower than the upper end of the contact electrode, and the second wiring layer having a sidewall at least partly in contact with the interlayer insulating film in the peripheral region.
地址 Minato-ku JP