发明名称 半導体装置
摘要 <p>A semiconductor device according to the present invention includes plural controlled chips CC0 to CC7 that hold mutually different layer information, and a control chip IF that supplies in common layer address signals A13 to A15 and a command signal ICMD to the controlled chips. Each bit that constitutes the layer address signals A13 to A15 is transmitted via at least two through silicon vias that are connected in parallel for each controlled chip out of plural first through silicon vias. Each bit that constitutes the command signal ICMD is transmitted via one corresponding through silicon via that is selected by an output switching circuit and an input switching circuit. With this configuration, the layer address signals A13 to A15 reach the controlled chips earlier than the command signal ICMD.</p>
申请公布号 JP5684590(B2) 申请公布日期 2015.03.11
申请号 JP20110016004 申请日期 2011.01.28
申请人 发明人
分类号 G11C5/00 主分类号 G11C5/00
代理机构 代理人
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地址
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