发明名称 Metastability prediction and avoidance in memory arbitration circuitry
摘要 <p>An integrated circuit with hazard prediction and prevention circuitry is provided. The hazard prediction circuitry may predict a future hazard condition between two periodic signals, and the hazard prevention circuitry may selectively delay at least one of the two periodic signals to avoid the predicted hazard condition. Single-port memory cells may provide multiport memory functionality using an arbitration circuit that includes the hazard prediction and prevention circuitry and receives memory access requests from at least two request generators. The arbitration circuit may operate in synchronous mode and perform port selection based on a predetermined logic table. The arbitration circuit may also operate in asynchronous mode and execute a memory access request as soon as it is received by the arbitration circuit. Metastability caused by receiving memory access requests at the same time from at least two request generators may be avoided with the hazard prediction and prevention circuitry. </p>
申请公布号 EP2838089(A3) 申请公布日期 2015.03.11
申请号 EP20140178460 申请日期 2014.07.25
申请人 ALTERA CORPORATION 发明人 LEWIS, DAVID
分类号 G11C7/10;G11C7/22 主分类号 G11C7/10
代理机构 代理人
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