| 摘要 |
<p>SRAM which receives a first driving voltage and a second driving voltage according to the present invention comprises: a memory cell to store data by receiving the first driving voltage; a perry circuit to be driven by the second driving voltage, to be connected to a bit line of the memory cell, and to perform precharge at the bit line to sense data stored in the memory cell; and a control logic to control the perry circuit to control a precharge level of the bit line when a level of the second driving voltage is lower than or equal to a reference value in sensing.</p> |
