发明名称 Liquid crystal display device and method of driving the same
摘要 A display device includes a display panel including a gate line and a data line, a gate driver that outputs a gate voltage to the gate line according to a gate output enable signal, a data driver that outputs a data voltage to the data line, a detecting circuit that detects a state of a clock signal. The state of the clock signal includes a normal or abnormal state. A masking circuit performs a masking operation for the gate output enable signal according to the state of the clock signal and a level of a reset signal, where the level of the reset signal includes a first or second level corresponding to a power-on or off of the display device, respectively.
申请公布号 US8976101(B2) 申请公布日期 2015.03.10
申请号 US200611605205 申请日期 2006.11.28
申请人 LG Display Co., Ltd. 发明人 Chang Chung-Ok;Kim Seok-Su;Yang Kwang-Won
分类号 G09G3/36 主分类号 G09G3/36
代理机构 Brinks Gilson & Lione 代理人 Brinks Gilson & Lione
主权项 1. A display device, comprising: a display panel including a gate line and a data line; a gate driver configured to output a gate voltage to the gate line based on a gate output enable signal; a data driver configured to output a data voltage to the data line; a detecting circuit configured to detect a state of a clock signal, wherein the state of the clock signal comprises a normal state or an abnormal state; a masking circuit configured to perform a masking operation for the gate output enable signal based on the state of the clock signal and a level of a reset signal, wherein the masking circuit performs the masking operation during the abnormal state of the clock signal and a predetermined time period after the abnormal state of the clock signal is changed into the normal state of the clock signal and when the power is on; and a timing controller configured to generate control signals, that are supplied to and control the gate driver and the data driver, based on the clock signal and transfer the reset signal to the masking circuit, wherein the control signals that control the gate driver include a gate shift clock, wherein the detecting circuit and the timing controller are supplied in common with the clock signal as an input from an external system.
地址 Seoul KR