发明名称 Constraining clock skew in a resonant clocked system
摘要 An integrated circuit includes a plurality of resonant clock domains of a resonant clock network. Each resonant clock domain has at least one clock driver that supplies a portion of clock signal to an associated resonant clock domain. The resonant clock network operates in a resonant mode with inductors connected to pairs of resonant clock domains at boundaries between the resonant clock domains. Each inductor forms an LC circuit with clock load capacitance in the pair of resonant clock domains to which the inductor is connected.
申请公布号 US8975936(B2) 申请公布日期 2015.03.10
申请号 US201213601119 申请日期 2012.08.31
申请人 Advanced Micro Devices, Inc. 发明人 Sathe Visvesh S.;Naffziger Samuel D.
分类号 G06F1/04;H03K3/00 主分类号 G06F1/04
代理机构 Abel Law Group, LLP 代理人 Abel Law Group, LLP
主权项 1. An integrated circuit comprising: a resonant clock network having a plurality of resonant clock domains formed in a grid pattern; a first resonant clock domain of the plurality of resonant clock domains disposed as a first section of the grid pattern adjacent to a second resonant clock domain of the plurality of resonant clock domains disposed as a second section of the grid pattern; a clock mesh branch crossing a boundary between the first and second resonant clock domains and coupling a first clock driver of the first resonant clock domain and a second clock driver of the second resonant clock domain; and an inductor connected to the clock mesh branch at the boundary between the first resonant clock domain and the second resonant clock domain, the boundary being a common edge of the first section and the second section.
地址 Sunnyvale CA US