发明名称 |
Semiconductor device and method of manufacturing the same |
摘要 |
A semiconductor device includes an insulated-gate field-effect transistor which is disposed on a semiconductor substrate having an element formation plane in a (110) plane direction, and which has a channel length direction in a <−110 > direction, and a first element isolation insulation film which is buried in a trench in an element isolation region of the semiconductor substrate and has a positive expansion coefficient, the first element isolation insulation film applying a compressive stress by operation heat to the insulated-gate field-effect transistor in the channel length direction. |
申请公布号 |
US8975702(B2) |
申请公布日期 |
2015.03.10 |
申请号 |
US200912638146 |
申请日期 |
2009.12.15 |
申请人 |
Kabushiki Kaisha Toshiba |
发明人 |
Jin Zhengwu |
分类号 |
H01L21/70;H01L21/8238;H01L29/04;H01L29/78 |
主分类号 |
H01L21/70 |
代理机构 |
Amin, Turocy & Watson, LLP |
代理人 |
Amin, Turocy & Watson, LLP |
主权项 |
1. A semiconductor device comprising:
an insulated-gate field-effect transistor which is disposed on a semiconductor substrate having an element formation plane in a (110) plane direction, and which has a channel length direction in a <−110 > direction; a first element isolation insulation film which is filled in a trench in an element isolation region of the semiconductor substrate and consists of a SiO2-based material, wherein the SiO2-based material has a positive expansion coefficient under the application of heat, and the insulated-gate field-effect transistor is in a state of compression in the channel length direction as a result of expansion of the first element isolation insulation film due to operation heat of the semiconductor device; and a second element isolation insulation film which is filled in a trench in an element isolation region of the semiconductor substrate and has a negative expansion coefficient, the second element isolation insulation film applying, together with the first element isolation insulation film, a tensile stress by operation heat to the insulated-gate field-effect transistor in two axial directions that are the channel length direction and a channel width direction. |
地址 |
Tokyo JP |