Method of creating a maskless air gap in back end interconnects with double self-aligned vias

摘要

A method including patterning a thickness dimension of an interconnect material into a thickness dimension for a wiring line with one or more vias extending from the wiring line and introducing a dielectric material on the interconnect material. A method including depositing and patterning an interconnect material into a wiring line and one or more vias; and introducing a dielectric material on the interconnect material such that the one or more vias are exposed through the dielectric material. An apparatus including a first interconnect layer in a first plane and a second interconnect in a second plane on a substrate; and a dielectric layer separating the first and second interconnect layers, wherein the first interconnect layer comprises a monolith including a wiring line and at least one via, the at least one via extending from the wiring line to a wiring line of the second interconnect layer.

主权项

1. A method comprising:
patterning a first interconnect material on a device layer of an integrated circuit substrate, the first interconnect material comprising length and width dimensions selected for a wiring line; patterning a thickness dimension of the first interconnect material into a thickness dimension for a first wiring line with one or more vias extending from the wiring line; introducing a dielectric material on the first interconnect material such that the one or more vias are exposed through the dielectric material; and after introducing the dielectric material, patterning a second interconnect material into a second wiring line coupled to one or more of the vias.