Analog sensing of memory cells in a solid-state memory device

摘要

A memory device that includes a sample and hold circuit coupled to a bit line. The sample and hold circuit stores a target threshold voltage for a selected memory cell. The memory cell is programmed and then verified with a ramped read voltage. The read voltage that turns on the memory cell is stored in the sample and hold circuit. The target threshold voltage is compared with the read voltage by a comparator circuit. When the read voltage is at least substantially equal to (i.e., is substantially equal to and/or starts to exceed) the target threshold voltage, the comparator circuit generates an inhibit signal.

主权项

1. A memory device comprising:
an array of memory cells organized in word lines and bit lines, each cell programmable to a target threshold voltage; a sample and hold circuit for storing a representation of the target threshold voltage; a current sensing circuit coupled between the sample and hold circuit and a bit line for detecting a bit line current in response to a read voltage on a word line; and a comparator circuit for generating an inhibit signal in response to a comparison between the representation of the target threshold voltage and a representation of the read voltage on the word line.