Stacked bit line dual word line nonvolatile memory

摘要

An arrangement of nonvolatile memory devices, having at least one memory device level stacked level by level above a semiconductor substrate, each memory level comprising an oxide layer substantially disposed above a semiconductor substrate, a plurality of word lines substantially disposed above the oxide layer; a plurality of bit lines substantially disposed above the oxide layer; a plurality of via plugs substantially in electrical contact with the word lines and, an anti-fuse dielectric material substantially disposed on side walls beside the bit lines and substantially in contact with the plurality of bit lines side wall anti-fuse dielectrics.

主权项

1. A manufacture method of a semiconductor device, comprising:
providing a substrate; forming first and second conductive lines over the substrate; forming a first plug coupled to the first conductive line, and orthogonal to the first conductive line and the substrate; forming a second plug coupled to the second conductive line, and orthogonal to the second conductive line and the substrate; forming a first memory cell disposed on a first sidewall beside the first plug, the first sidewall being orthogonal to the substrate; and forming a second memory cell disposed on a second sidewall beside the second plug, the second sidewall being orthogonal to the substrate, wherein the first memory cell is over the second memory cell.