Anti-fuse device

摘要

An electrically programmable gate oxide anti-fuse device includes an anti-fuse aperture having anti-fuse links that include metallic and/or semiconductor electrodes with a dielectric layer in between. The dielectric layer may be an interlayer dielectric (ILD), an intermetal dielectric (IMD) or an etch stop layer. The anti-fuse device may includes a semiconductor substrate having a conductive gate (e.g., a high K metal gate) disposed on a surface of the substrate, and a dielectric layer disposed on the conductive gate. A stacked contact can be disposed on the dielectric layer and a gate contact is disposed on an exposed portion of the gate.

主权项

1. A gate oxide anti-fuse device comprising:
a semiconductor substrate having an active region; a gate disposed on an active surface of the active region of the semiconductor substrate; a dielectric layer disposed on the gate; a stacked contact disposed on a surface of the dielectric layer opposite the gate, the dielectric layer disposed between the stacked contact and the gate; and a gate contact disposed on the gate.