发明名称 MEMORY CONTROLLER, STORAGE DEVICE AND MEMORY CONTROL METHOD
摘要 According to one embodiment, a memory controller in an embodiment includes an encoding unit configured to generate a first parity group from first group data including first and second unit data using G1 (x), generate a second parity group from second group data including third and fourth unit data using G1 (x), and generate a third parity group from the first and second group data and the first and second parity groups using G2 (x), a root of which continues form a root of G1 (x). The memory controller writes the first to fourth unit data and the first to third parity groups in different pages of a nonvolatile memory.
申请公布号 US2015067453(A1) 申请公布日期 2015.03.05
申请号 US201414193166 申请日期 2014.02.28
申请人 Kabushiki Kaisha Toshiba 发明人 KOKUBUN Naoaki;TORII Osamu
分类号 H03M13/15 主分类号 H03M13/15
代理机构 代理人
主权项 1. A memory controller for controlling a nonvolatile memory, comprising: an encoding unit configured to: generate a first parity group using a first generator polynomial, the first parity group being generated for first group data including first unit data and second unit data;generate a second parity group using the first generator polynomial, the second parity group being generated for second group data including third unit data and fourth unit data; andgenerate a third parity group using a second generator polynomial, the third parity group being generated for the first group data, the second group data, the first parity group, and the second parity group, the second generator polynomial having consecutive roots from roots of the first generator polynomial; and a write control unit configured to: write the first unit data, the second unit data, the third unit data, the fourth unit data, the first parity group, the second parity group, and the third parity group respectively in different pages of the nonvolatile memory.
地址 Minato-ku JP