发明名称 MEMORY SYSTEM AND CONTROLLER
摘要 According to one embodiment, according to one embodiment, a memory system includes a first memory, a second memory, an interface, a managing unit, and a control unit. The second memory stores data read out from the first memory. The interface receives a read command. The managing unit manages a corresponding relationship of a first address included in the read command and a second address. The second address is an address indicating a position in the first memory where data designated by the first address is stored. The control unit acquires a plurality of second addresses corresponding to a sequential first address range including the first address in a case where the read command is received, and determine an amount of data to be read out from the first memory to the second memory based on whether the plurality of second addresses is sequential or not.
申请公布号 US2015067276(A1) 申请公布日期 2015.03.05
申请号 US201414169369 申请日期 2014.01.31
申请人 Kabushiki Kaisha Toshiba 发明人 MITO Daisuke;KOJIMA Yoshihisa
分类号 G06F3/06 主分类号 G06F3/06
代理机构 代理人
主权项 1. A memory system comprising: a first memory; a second memory configured to store data read out from the first memory; an interface configured to receive a read command from outside the memory system; a managing unit configured to manage a corresponding relationship of a first address included in the read command and a second address, the second address being an address indicating a position in the first memory where data designated by the first address is stored; and a control unit configured to acquire a plurality of second addresses corresponding to a sequential first address range including the first address included in the read command in a case where the read command is received, and determine an amount of data to be read out from the first memory to the second memory in response to the read command based on whether the plurality of second addresses is sequential or not.
地址 Minato-ku JP