发明名称 ANALOG AMPLIFIER FOR RECOVERING ABNORMAL OPERATION OF COMMON MODE FEEDBACK
摘要 An analog amplifier for recovering an abnormal operation of a common-mode feedback is provided. An analog variable amplifier includes a first input transistor and a second input transistor, a first output transistor and a second output transistor, a third transistor and a fourth transistor, a first current source, a fifth transistor and a sixth transistor, and a second current source. The first input transistor and the second input transistor amplify a bias current depending on a magnitude of a first input voltage and a second input voltage. The first output transistor and the second output transistor output the amplified bias current. The third transistor and the fourth transistor receive an output voltage of the first output transistor as an input and amplifying the received output voltage. The first current source provides a predetermined current between the first output transistor and the third transistor.
申请公布号 US2015061764(A1) 申请公布日期 2015.03.05
申请号 US201314016704 申请日期 2013.09.03
申请人 Samsung Electronics Co. Ltd. 发明人 LEE Jong-Woo;CHO Thomas Byung-Hak;LIM Jae-Hyun
分类号 H03F3/45 主分类号 H03F3/45
代理机构 代理人
主权项 1. An analog variable amplifier comprising: a first input transistor and a second input transistor configured to amplify a bias current depending on a magnitude of a first input voltage and a second input voltage; a first output transistor and a second output transistor configured to output the amplified bias current; a third transistor and a fourth transistor configured to receive an output voltage of the first output transistor as an input and to amplify the received output voltage; a first current source configured to provide a predetermined current between the first output transistor and the third transistor; a fifth transistor and a sixth transistor configured to receive an output voltage of the second output transistor as an input and to amplify the received output voltage; and a second current source configured to provide a predetermined current between the second output transistor and the fifth transistor.
地址 Suwon-si KR