发明名称 |
NEGATIVE BIAS THERMAL INSTABILITY STRESS TESTING OF TRANSISTORS |
摘要 |
A circuit is powered through a P-type transistor whose thermal instability behavior is to be evaluated. The threshold of the P-type transistor under evaluation and consequently the saturation current of the transistor are reflected in the frequency of the circuit, which in one embodiment is a ring oscillator. Additional circuitry is connected to the P-type transistor and the ring oscillator to ensure the proper stress conditions for the transistor and consequently to the evaluation of the P-type transistor. |
申请公布号 |
US2015061726(A1) |
申请公布日期 |
2015.03.05 |
申请号 |
US201414461327 |
申请日期 |
2014.08.15 |
申请人 |
Synopsys, Inc. |
发明人 |
KAWA Jamil;YEH Tzong-Kwang Henry;SUN Shih-Yao Christine;LEUNG Raymond Tak-Hoi |
分类号 |
G01R31/26 |
主分类号 |
G01R31/26 |
代理机构 |
|
代理人 |
|
主权项 |
1. A circuit comprising:
a transistor for testing, the transistor having a gate-to source voltage Vgs and a drain-to-source voltage Vds; a sensor circuit connected to the drain of the transistor; a complementary control circuitry attached to the transistor and the sensor circuit such that the sensor circuit is powered off during a stress test of the transistor, and the drain-to-source voltage of the transistor for testing is zero during the stress test, and the sensor circuit is powered through the transistor during an evaluation of the stress test. |
地址 |
Mountain View CA US |