INTEGRATED CIRCUIT PROVIDING FAULT PREDICTION

摘要

The prediction of hardware failure is obtained by operating two redundant circuit modules while one circuit module is artificially aged. The output of the two circuit modules is compared and a discrepancy between outputs indicates a projected failure of the aged modules. Aging may be accomplished by one or a combination of lowering operating voltages and re-phasing a sampling clock to reduce slack time both of which provide increased sensitivity to gate delay.

主权项

1. An integrated circuit comprised of multiple gates subject to increased gate delay with age, the integrated circuit comprising:
at least a first and second redundant circuit module generating first and second respective outputs; a reliability circuitry operating to:
(a) momentarily and selectively applying a stress to the first redundant circuit module in a manner mimicking age-increased gate delay without applying the stress to the second redundant circuit module;(b) capture first and second values based on the respective first and second outputs from first and second redundant circuit modules during the stressing, and(c) compare the captured first and second values to detect errors caused by the selective stressing.